12/16/2020 » Heterogeneous Multicore Debug Paper by Róisín O’Keeffe

December 2020 – Limerick, Ireland.
Author: Róisín O’Keeffe, Ashling

Introduction

Over the last decade there has been a dramatic increase in multicore designs in embedded SoCs, driven by requirements for improved power consumption, cost efficiency, performance, smaller form factors, and concurrent application needs. More recently, designs have shifted toward heterogeneous multicore SoCs, where different cores (e.g., Arm, RISC-V, ARC, MIPS, DSPs) are combined, as certain cores are better suited to specific tasks.

One barrier to adoption has been the lack of suitable debug environments. Historically, toolsets were vendor-specific, requiring separate debuggers for each architecture, making SoC-wide visibility and control impossible.

RiscFree™ IDE

Ashling’s RiscFree™ IDE is an Eclipse-based, vendor-independent solution enabling heterogeneous multicore development and debug. It supports writing, building, simulation, and hardware debugging within a single unified environment.

Features include:

  • GCC and LLVM compiler toolchains for multiple architectures

  • Comprehensive multicore debugger with Opella-XD hardware probe support

  • Single installer with “out-of-the-box” setup for homogeneous and heterogeneous targets

Heterogeneous Multicore Debugging

RiscFree enables debug across Arm+RISC-V, RISC-V+ARC, and other architecture mixes. Developers can launch debug sessions manually or use group launch automation for simultaneous connections.

Key features:

  • Debug Configurations: Automated group launch for connecting to multiple cores (Fig. 3)

  • Multiple Debug Connections: Manage parallel sessions across architectures (Fig. 4)

  • Pin & Clone: Compare and track variables, registers, memory, or disassembly across cores with color-coded pinned views (Fig. 5)

  • SoC-Wide Breakpoints: Option to halt/resume all cores or just the selected one

  • Scripting Support: Automate setup and testing for large multicore applications

  • Advanced Debug Features: Real-time trace, profiling, and code coverage integrated with multicore debug

Conclusion

As heterogeneous multicore SoCs become more common, debug tools must evolve to deliver SoC-wide visibility and control. Ashling’s RiscFree IDE provides a comprehensive, vendor-independent heterogeneous multicore debugger with advanced automation, profiling, and trace features—empowering engineers to efficiently debug complex applications.

For more details visit: www.ashling.com

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